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MT6318 PMIC Specification
Datasheet
Document Number:
Preliminary (Released) Information
Revision: 1.0
Release Date: Oct. 11, 2006
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Revision History
Revision 0.1 0.2 0.3 1.0
Date (yyyy/mm/dd) Author 2005/09/09 2006/05/09 2006/06/19 2006/10/11
(unistar
Comments Revision Cathy Chen HI Chen Naomi Ko Initial release. Cathy Chen
English review and document reformatting. Complete the electrical spec. and append the waveform. Correct some descriptions.
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Table of Contents
Legal Disclaimer ........................................................................................................................................................... 2 Revision History ........................................................................................................................................................... 3 Table of Contents.......................................................................................................................................................... 4 1 1.1 1.2 1.3 1.4 1.5 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 4 4.1 4.2 5 Introduction ......................................................................................................................................................... 6 Features ......................................................................................................................................................... 6 Applications .................................................................................................................................................... 6 General Description ........................................................................................................................................ 6 Ordering Information....................................................................................................................................... 6 Pin Assignments and Descriptions.................................................................................................................. 7 Electrical Characteristics ................................................................................................................................. 10 Absolute Maximum Ratings over Operating Free-Air Temperature Range ................................................... 10 Recommended Operating Range ................................................................................................................. 10 Electrical Characteristics .............................................................................................................................. 10 Regulator Output .......................................................................................................................................... 11 SPI Switchable Powers................................................................................................................................. 13 Speaker Amplifier.......................................................................................................................................... 14 SIM Interface ................................................................................................................................................ 14 Charger Circuit.............................................................................................................................................. 15 Electrical Characteristics Waveform ............................................................................................................. 16 Pin Assignments ............................................................................................................................................... 28 Introduction ....................................................................................................................................................... 31 Overview....................................................................................................................................................... 31 Terms and Definitions ................................................................................................................................... 32 Functional Description ..................................................................................................................................... 33 5.1 5.2 5.3 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.3.7 5.3.8 5.4 5.5 6 6.1 6.2 General......................................................................................................................................................... 33 State Timing.................................................................................................................................................. 36 PMIC Functional Blocks................................................................................................................................ 38 Charger Circuit ....................................................................................................................................... 38 Low Dropout Regulator (LDOs) and Reference ..................................................................................... 45 LED Drivers ............................................................................................................................................ 46 Control for Backlight Driver .................................................................................................................... 47 Dimming Control..................................................................................................................................... 47 Battery Voltage Monitor .......................................................................................................................... 48 Speaker Amplifier ................................................................................................................................... 48 SPI ......................................................................................................................................................... 48 Register Table and Descriptions ................................................................................................................... 49 Connection to the Baseband ........................................................................................................................ 57
MT6318 Packaging............................................................................................................................................ 58 Package Dimensions .................................................................................................................................... 58 Application Examples ................................................................................................................................... 60
Appendix ..................................................................................................................................................................... 61
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Index of Figures.......................................................................................................................................................... 62 Index of Tables............................................................................................................................................................ 63
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1
Introduction
1.1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Features
Handles all GSM/GPRS Baseband Power Management Input range: 2.8 V ~ 5.0 V Charger input of up to 15 V 11 LDOs optimized for specific GSM/GPRS subsystems 2-step RTC LDO 600 mW Class AB audio amplifier Booster for series backlight LED driver Charge pump for parallel backlight LED driver SPI interface Pre-charge indication Li-ion battery charge function SIM card interface RGB LED driver Vcore for power-saver mode Over-current and thermal overload protection Programmable under voltage lockout protection Power-on reset and start-up timer 96-pin TFBGA package
1.3
General Description
The MT6318 is a power management system chip optimized for GSM/GPRS handsets, especially those based on the MediaTek MT621x/MT622x system solution. MT6318 contains 11 LDOs, one to power each of the critical GSM/GPRS sub-blocks. Sophisticated controls are available for power-up during battery charging, for the keypad interface, and for the RTC alarm. The MT6318 is optimized for maximum battery life. The 2-step RTC LDO design allows the RTC circuit to stay alive without a battery for several hours. The MT6318 battery charger can be used with a lithium-ion (Li+) battery. The SIM interface provides the level shift between SIM card and microprocessor. The MT6318 is available in a 96-pin TFBGA package. The operating temperature range is -25 to +85 C C.
1.2
Applications 1.4
ORDER #
GSM/GPRS mobile handsets, basic phones and high-end phones.
Ordering Information
MARKING TEMP. RANGE PACKAGE
MT6318A
MT6318A/AY -25 to +85 TFBGA - 96L C C
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1.5
Pin Assignments and Descriptions
Figure 1: MT6318 TFBGA 96(7x7 mm ) Pin Assignments
2
1 A B C D E F G H J K
LED_KP
2
C2+
3
C1+
4
C1+
5
6
7
8
9
10
BAT_ BACKUP
PWRIN4 FB_BL
BLDRV PWRIN3 PWRBB
A B C D E F G H J K
VO_G
VO_R
CS_KP
DC_OV PWRIN4 CS_BL
RST CAP
PWRIN3
INT
BAT_ON
V_USB
VO_B
GND4
GND4
PWRIN4
GND4
GND4
PWRIN3
RTC _SEL
VIO
USB
GDR VUSB GDR VAC
GND1
GND4
PWRIN4
GND4
GND3
GND3
PWRIN2 PWRIN2
AC
GND1
GND1
GND3
GND3
VD_ SEL
VA_SW
VBAT
ISENSE
GND1
GND1
GND3
SPICS
RESET
VIBR
VN
SEL2
GND1
GND1
GND2
GND2
GND2
SPICK
SRCLK EN SIM VCC
VRTC
VTCXO
SEL1
SEL1 _EN
GND2
ISENSE _OUT
GND2
GND2
SIO
SIM RST
PWRIN1 PWRIN1 PWRIN1 VB_OUT
AUDP
AUDN
SIMIO
SPIDAT
SRST
VD
VA
BP/REF
VMC
VM_ SEL
SPK+
SPK-
PWR KEY
VSIM
SIM CLK
SCLK
1
2
3
4
5
6
7
8
9
10
Preliminary Information
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Table 1: MT6188 Pin Descriptions Pin Control K7 A9 G9 H9 B10 B4 K4 H3 C9 E9 Charger Control E1 D1 C1 PWRKEY PWRBB SRCLKEN SIMVCC BAT_ON DC_OV VM_SEL SEL1_EN RTC_SEL VD_SEL I I I I I I I I I I Power on button input. Active low. Power on/off from microprocessor. Active high. VTCXO and VA enable. High = enable. Low = disable. VSIM enable. High = enable. Low = disable. Indication that Li-ion battery is inserted. High = no battery. Low = battery inserted. DC/DC protection input. OV threshold voltage is 1V. External memory supply selection. 1 = 2.8V, 0 = 1.8V. Enable the "pre-charge indication" function. 1 = enable, 0 = disable. (Note1) VRTC output voltage selection. 1 = 1.5V, 0 = 1.2V (Note1) VD output voltage selection. 1 = 1.8V/1.5V, 0 = 1.2V/0.9V (depending on the register PWR_SAVE setting). AC-DC adaptor input USB power input 3.3V USB power output Interrupt PIN. Active low. This pin informs the BB if an AC or USB voltage is detected, or if OVP (AC > 9V) is detected. Is reset to normal high after BB has communicated with the PMIC through SPI. Control output to the gate of the external p-channel FET for the USB charger. Control output to the gate of the external p-channel FET for the AC charger. Charger current sensing input Control output to the gate of the external PMOS for the AC charger input as power source. Control output to the gate of the external PMOS for the VBAT input as power source. Non level-shifted SIM data (3V) Non level-shifted SIM reset input (3V) Non level-shifted SIM clock input (3V) Level-shifted SIM data (1.8/3V) Level-shifted SIM reset output (1.8/3V) Level-shifted SIM clock output (1.8/3V) Reset delay time capacitance System reset. Low active.
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Symbol
Input (I), Output (O), or Analog (A)
Description
AC USB V_USB
IA IA OA
B9
INT
O
D2 E2 F2 H2 G2 SIM Interface J7 H10 K9 H8 J9 K10 Reset B7 F9
GDRVUSB GDRVAC ISENSE SEL1 SEL2
OA OA OA OA OA
SIMIO SIMRST SIMCLK SIO SRST SCLK RSTCAP RESET
I/O I I I/O O O IA O
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Power-Related F1 J1, J2, J3, D9, D10, A8, B8, C8, A5, B5, C5, D5 J4 H5 K2 D3, E3, E4, F3, F4, G3, G4, G5, G6, G7, H4, H6, H7, D7, D8, E7, E8, F7, C3, C4, C6, C7, D4, D6 J10 C10 K1 E10 H1 G1 K8 G10 K3 Miscellaneous F10 A3 A4 A2 A10 Speaker Amplifier J5 J6 K5 K6 LED Driver B2 B1 C2 A1 B3 A7 B6 A6 SPI Interface F8 G8 J8 VO_R VO_G VO_B LED_KP CS_KP BLDRV CS_BL FB_BL SPICS SPICK SPIDAT
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VBAT PWRIN VB_OUT ISENSE_OUT BP/VREF GND VD VIO VA VA_SW VTCXO VM VSIM VRTC VMC VIBR C1+ C1C2+ BAT_BACKUP AUDP AUDN SPK+ SPK-
IA IA OA OA OA
Battery input voltage Power input Battery output voltage. Switchable. ISENSE output voltage. Switchable. Bandgap reference and bypass capacitance Ground
OA OA OA OA OA OA OA OA OA OA A A A OA IA IA OA OA IA IA IA OA IA OA IA IA I I IO
Digital core supply Digital IO supply Analog supply Auxiliary analog supply. Switchable. TCXO supply Memory supply SIM supply RTC supply Memory card supply Vibrator driver Charge pump capacitor. Positive terminal. Charge pump capacitor. Negative terminal. DC/DC output back-up capacitor. Positive terminal. Backup battery pin for 2-step RTC Audio positive input Audio negative input Speaker positive output Speaker negative output R LED current driver G LED current driver B LED current driver KP LED driver KP LED current sensor Control output to the gate of the external FET for the backlight DC-DC converter. Voltage sensor input for external BL FET current Voltage sensor input from white LED ballast resistor Serial port select input Serial port clock input Serial port I/O
Note1: The state of these pins is latched when MT6318 starts up. The state can changed only by powering down and powering up MT6318 again.
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2
Electrical Characteristics
2.1
Absolute Maximum Ratings over Operating Free-Air Temperature Range
Stresses beyond those listed under Table 2 may cause permanent damage to the device. These numbers are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2: Absolute Maximum Ratings Parameter Free-air temperature range Storage temperature range Battery input voltage range ESD robustness Charger input withstand Conditions Min. -40 -65 HBM 2000 15 Typical Max. 85 150 5.5 Unit C C V V V
2.2
Recommended Operating Range
Table 3: Operation Condition
Parameter Operating temperature range
Conditions
Min. -25
Typical
Max. 85
Unit C
2.3
Electrical Characteristics
Table 4: General Electrical Specifications VBAT = 3 V ~ 5 V, minimum loads applied on all outputs, unless other noted. Typical values are at TA = 25 C.
Parameter Switch-Off Mode: Supply Current VBAT < 2.5 V 2.5 V < VBAT < 3.3 V 3.3 V < VBAT Operation: Supply Current All outputs on VSIM, VTXCO off; all others on Under Voltage (UV) Under voltage falling threshold 1 Under voltage falling threshold 2 Under voltage falling threshold 3 Under voltage falling threshold 4 Under voltage rising threshold
Conditions RTC LDO OFF VBAT=3.3V VBAT=4.2V VBAT=4.2V VBAT=4.2V
UV_SEL[1:0] = 00 UV_SEL[1:0] = 01 UV_SEL[1:0] = 10 UV_SEL[1:0] = 11 UV_SEL[1:0] = xx
Min.
Typical 10 37 43 295 240
Max. 20 70 85 500 400 2.95 2.8 2.65 2.65 3.3
Unit A A A A A V V V V V
2.85 2.7 2.55 2.35 3.1
2.9 2.75 2.6 2.5 3.2
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Reset Generator Output High Output Low Output Current On Delay Time per Unit Capacitance Power Key Input High Voltage Low Voltage Control Input Voltage PWRBB Input High PWRBB Input Low Other Control Input High Other Control Input Low Thermal Shutdown Threshold Hysteresis LDO Enable Response Time
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VIO-0.5 0.3 1.5 0.7*VBAT 0.3*VBAT 1.0 0.2 2.0 0.5 150 40 250 1 2.5 4
V V mA ms/nF V V V V V V degree degree s
2.4
Regulator Output
Table 5: Regulator Specifications
Parameter
Conditions
Min.
Typical
Max.
Unit
Charge Pump Regulator - For keypad and RGB LED drivers Output ripple Efficiency Switching frequency Output current Response time: rising Response time: falling Start-up Time Feedback voltage DC/DC Converter Efficiency Switch on max. Duty cycle Switching frequency Voltage for BL FET current sense (CS_BL) Feedback voltage (FB_BL) Over-voltage threshold (DC_OV) Digital Core Voltage Output voltage (V_D) VD_SEL=L & PWR_SAVE_SPI=H
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Iout = 80 mA, Vout = 4.5 V Normal load No load LEDKP ON (80mA load) LEDKP OFF (80mA load) 150 6 LEDs' load 65 675 0.13 0.35 0.95 0.75
50 62 900 80 2 1.5 90 250 200 85 75 900 0.15 0.4 1.0 0.8
250
mV % kHz mA mA s s s mV % % kHz V V V V
85 1180 0.23 0.65 1.05 0.85
L to H H to L
0.9
V
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VD_SEL=L & PWR_SAVE_SPI=L VD_SEL=H & PWR_SAVE_SPI=H VD_SEL=H & PWR_SAVE_SPI=L Output current (Id_max) Line regulation Load regulation Digital IO Voltage Output voltage (V_IO) Output current (Iio_max) Line regulation Load regulation Analog Voltage Output voltage (V_A) Output current (Ia_max) Line regulation Load regulation Output noise voltage Ripple rejection VTCXO Voltage Output voltage (V_TCXO) Output current (Itcxo_max) Line regulation Load regulation Output noise voltage Ripple rejection RTC Voltage 1 stage output voltage nd 2 stage output voltage (V_RTC) Output current limit (Irtc_max) Off reverse input current External Memory Voltage Output voltage (V_M) Output current (Im_max) Line regulation Load regulation SIM Voltage Output voltage (V_SIM) Output current (Isim_max) VSIMSEL=L VSIMSEL=H VMSEL=L VMSEL=H
st
1.1 1.4 1.7
1.2 1.5 1.8 200
1.3 1.6 1.9 5 30
V V V mA mV mV V mA mV mV V mA mV mV uVrms dB dB V mA mV mV Vrms dB dB V V V mA A V V mA mV mV V V mA
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2.7
2.8 100
2.9 5 30
2.7
2.8 150
2.9 5 20
f = 10 Hz to 100 kHz 10 Hz < freq. < 3 kHz 3 kHz < freq. < 100 kHz 2.7
50 65 40 2.8 20 2.9 4 4
f = 10 Hz to 100 kHz 10 Hz < freq. < 3 kHz 3 kHz < freq. < 100 kHz 2.65 1.3 1.05
50 65 40 2.75 1.5 1.2 1.1 1 1.8 2.8 150 2.85 1.65 1.32
RTC_SEL=H RTC_SEL=L st 1 stage RTC
1.7 2.7
1.9 2.9 8 30
1.71 2.82
1.8 3.0 20
1.89 3.18
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Line regulation Load regulation Memory Card Voltage Output voltage (V_MC) Output current (Imc_max) Line regulation Load regulation KP_LED Voltage Output voltage (V_KP) Output current (I_KP) R/G/B LED Source current 1 (I_R/G/B) Source current 2 Source current 3 Source current 4 USB Voltage Output voltage (V_USB) Line regulation Load regulation Output current (Iusb_max) Auxiliary Analog Voltage Output voltage (VA_SW) Line regulation Load regulation Output current (Iswa_max) Vibrator Voltage Output voltage (V_VIBR) Output current (Ivibr_max) VIBSEL=L VIBSEL=H
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4 15 mV mV V V mA mV mV V mA mA mA mA mA V mV mV mA V V mV mV mA V V mA
VMCSEL=L VMCSEL=H
2.7 2.87
2.8 3.0 250
2.9 3.13 5 35
4.3 80 8 11 14 16 3.15 12 16 20 24 3.3 16 21 26 32 3.45 5 10
20 VA_SW_SEL=L VA_SW_SEL=H 2.7 3.15 2.8 3.3 2.9 3.45 5 15
50 1.7 3.05 1.8 3.2 200 1.9 3.35
2.5
SPI Switchable Powers
Table 6: Power Switch Specifications
Parameter VB_OUT
Conditions VBSSEL_SPI[1] = 1 VBHSEL = 0 VBHSEL = 1 VBSSEL_SPI[0] = 1 VBHSEL = 0 VBHSEL = 1
Min. VBAT*0.99*0.5 VBAT*0.99 ISENSE*0.99*0.5 ISENSE*0.99
Typical
Max. VBAT*1.01*0.5 VBAT*1.01 ISENSE*1.01*0.5 ISENSE*1.01
Unit V V V V
ISENSE_OUT
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Table 7: Speaker Amplifier Specifications Parameter RMS Power THD+N PSRR Shutdown current Quiescent power supply current Gain adjustment Gain adjustment steps Conditions 8 load, VBAT = 5 V 8 load, VBAT = 3.3 V 1KHz, Po=0.25Wrms, 4V 20 Hz ~ 1 kHz, diff. mode "Speaker On" bit = 0 VBAT = 4.2 V, no input 0 Refer to Table 23, Index 1 (Charger/Speaker Control) 3 Min. Typical 800 400 0.007 55 Max. Unit mW mW % dB A mA dB dB
0.3 1 4.0 21
2.7
SIM Interface
Table 8: SIM Interface Specifications
Parameter Interface to MT621X Vih(SIMCLK,SIMRST) Vil (SIMCLK,SIMRST) Vilsimio Vihsimio, Vohsimio Iilsimio Volsimio SIMIO pull-up resistance to Vio Interface to 3 V SIM Card Volrst Vohrst Volclk Vohclk Vil Vihsio , Vohsio Iil Vol Interface to 1.8 V SIM Card Volrst Vohrst Volclk Vohclk Vil Vihsio , Vohsio Iil I = 20 A I = -200 A I = 20 A I = -200 A I = 20 A Vil = 0 V I = 20 A I = -200 A I = 20 A I = -200 A
Conditions
Min.
Typical
Max.
Unit
Vio-0.6 Vol 0.4 V, Iol = 1 mA Vol 0.4 V, Iol = 0 mA Iih, Ioh = 20 A Vil = 0 V Vil = 0.4 V Vio-0.6 -0.9 0.42 24 0.4 0.9*VSIM 0.4 0.9*VSIM 0.4 I = 20 A Vil = 0 V Iol = 1 mA, SIMIO 0.23 V VSIM-0.4 -1 0.4 0.2*VSIM 0.9*VSIM 0.2*VSIM 0.9*VSIM 0.4 VSIM-0.4 -1 0.6 0.23 0.335
16
20
V V V V V mA V k V V V V V V mA V V V V V V V mA
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Vol SIM Card Interface Timing SIO pull-up resistance to VSIM SRST, SIO rise/fall times SCLK rise/fall times SCLK frequency SCLK duty cycle SCLK propagation delay
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Iol = 1 mA, SIMIO 0.23 V 8 VSIM = 3, 1.8 V, load with 30 pF VSIM = 3 V, CLK load with 30 pF VSIM = 1.8 V, CLK load with 30 pF CLK load with 30 pF SIMCLK Duty = 50%, fsimclk = 5 MHz 10
0.4 12 1 18 50
V k s ns ns MHz % ns
5 47 30 53 50
2.8
Charger Circuit
Table 9: Charger Specifications
Parameter AC charger input voltage AC charger detect on threshold (Vchg_on) USB charger detect on threshold Maximum charging current (AC charging) Pre-charging current Pre-charging off threshold Pre-charging off hysteresis CC mode to CV mode threshold BAT_ON (Vih) GDRVAC/GDRVUSB rising time (Tr) Over voltage protection threshold (OV)
Conditions
Min. 4.2 VBAT 2.2
Typical
Max. 15 9.0 5.5
Unit V V V A mA mA V V V V s V
VBAT>=3.3V VBAT<2.3V VBAT>=2.3V
5/ Rsense
0.16 / Rsense 10 10/ Rsense 15/ Rsense 3.3 0.3 4.2 4.25 2.6 5 4.3
4.15 2.4 BAT_ON, or OV 1
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2.9
Electrical Characteristics Waveform
(V_PWRIN=3.0V-5.0V, CVA= CVIO=CVM=CVMC=4.7F, CVD=CVUSB=CVA_SW =CVTCXO=CVSIM=CVIBR=2.2F, CVTCXO=CBP/VREF=1uF, CVRTC=0.1F, minimum loads applied on all outputs, unless otherwise noted. C.) Typical values are at TA=+25
VCORE18 vs. ICORE18
1.814 1.812
VCORE12 vs. ICORE12
1.202
1.200
VBAT=4.2V VBAT=3.6V VBAT=3.2V
VCORE12(V)@T=25oC
VCORE18(V)@T=25 C
o
1.810 1.808 1.806 1.804 1.802
VBAT=4.2V
1.198
VBAT=3.6V
1.196
VBAT=3.2V
1.194
1.192
0 50 100 150 200
0
50
100
150
200
ICORE18(mA)
ICORE12(mA)
VCORE18 vs. Vbat
1.828
1.200
VCORE12 vs. Vbat
VCORE18(V)@ICORE18=50mA
1.824
1.820
VCORE12(V)@ICORE12=50mA
1.198
1.196
1.816
1.194
1.812
1.808 3.0
3.5
4.0
4.5
5.0
1.192 3.0
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
VCORE18 vs. Temp
2.792
1.815 1.810 1.805 1.800 1.795 1.790 1.785 1.780 1.775 -40
VM28 vs. Temp
2.788
VM28(V)@Vbat=3.6V
-20 0 20 40
o
VCORE18(V)@Vbat=3.6V
2.784
2.780
2.776
2.772
60
80
2.768 -40
-20
0
20
40
o
60
80
Temp( C)
Temp( C)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VM18 vs. IM18
1.824
VM28 vs. IM28
2.840 2.836
1.820
VBAT=4.2V
2.832
VM18(V)@T=25 C
1.816
VM28(V)@T=25 C
o
2.828 2.824 2.820 2.816 2.812
VBAT=4.2V VBAT=3.6V VBAT=3.2V
o
1.812
VBAT=3.6V
1.808
VBAT=3.2V
1.804
1.800 0 20 40 60 80 100 120 140 160
2.808 0 20 40 60 80 100 120 140 160
IM18(mA)
IM28(mA)
VM18 vs. Vbat
1.810
VM28 vs. Vbat
2.816
1.808
2.812
VM18(V)@IM18=25mA
1.806
VM28(V)@IM28=25mA
2.808
1.804
2.804
1.802
1.800 3.0
3.5
4.0
4.5
5.0
2.800 3.0
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
VA vs. IA
2.836
2.844 2.842 2.840
VTCXO vs. ITCXO
2.832
2.828
o
2.824
VBAT=4.2V VBAT=3.6V
VTCXO(V)@T=25 C
VA(V)@T=25 C
2.838
o
VBAT=4.2V
2.836
VBAT=3.6V
2.834 2.832 2.830
2.820
VBAT=3.2V
2.816
VBAT=3.2V
2.812
2.828
2.808 0 20 40 60 80 100 120 140 160
2.826 0 5 10 15 20
IA(mA)
ITCXO(mA)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VA vs. Vbat
2.824
VTCXO vs. Vbat
2.820
2.818
VTCXO(V)@VTCXO=5mA
3.5 4.0 4.5 5.0
2.820
VA(V)@IA=25mA
2.816
2.816
2.814
2.812
2.812
3.0
2.810 3.0
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
VA vs. Temp
2.810
VTCXO vs. Temp
2.808 2.804
2.805
VTCXO(V)@Vbat=3.6V
VA(V)@Vbat=3.6V
2.800
2.800 2.796 2.792 2.788 2.784
2.795
2.790
2.785
2.780 -40
-20
0
20
40
o
60
80
-40
-20
0
20
40
60
80
Temp( C)
Temp( )
2.840 2.838 2.836 2.834
VIO vs. IIO
2.825
VIO vs. Vbat
2.820
VIO(V)@T=25 C
VBAT=4.2V VBAT=3.6V
2.830
VIO(V)@IIO=25mA
80 100
2.832
o
2.815
VBAT=3.2V
2.828 2.826 2.824 2.822 2.820 0 20 40 60
2.810
2.805
IIO(mA)
2.800 3.0
3.5
4.0
4.5
5.0
Vbat(V)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VREF vs. Vbat VIO vs. Temp
2.790 2.788 2.786 1.198 1.200
VIO(V)@Vbat=3.6V
2.784
o
2.782 2.780 2.778 2.776 2.774 2.772 2.770 -40
VBP(V)@25 C
1.196
1.194
1.192
-30
-20
-10
0
10
20
o
30
40
50
60
70
1.190 2.5
3.0
3.5
4.0
4.5
5.0
Temp( C)
VBAT(V)
VSIM18 vs. ISIM18
1 1 . . 8 8 0 0 2 0 0 5 1 0 1 5 2 0
VSIM30 vs. ISIM30
3.020 3.018 3.016 3.014
I
S
I
M
1
8
(
m
A
)
VBAT=4.2V
VBAT=3.6V
VSIM30(V)@T=25 V
o
3.012 3.010 3.008 3.006 3.004 3.002 3.000 0 5 10 15 20
VBAT=3.2V
ISIM30(mA)
VSIM18 vs. Vbat
1.814
VSIM30 vs. Vbat
3.020
1.812
3.018
VSIM30(V)@VSIM30=5mA
3.5 4.0 4.5 5.0
VSIM18(V)@VSIM18=5mA
1.810
3.016
1.808
3.014
1.806
3.012
1.804
3.010
1.802 3.0
3.008 3.0
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VRTC12 vs. Vbat
1.112
VRTC15 vs. Vbat
1.516
1.110
1.512
1.108
VRTC12(V)
1.508
1.106
VRTC15(V)
3.0 3.5 4.0 4.5 5.0
1.504
1.104
1.500
1.102 2.5
1.496
Vbat(V)
1.492 2.5
3.0
3.5
4.0
4.5
5.0
Vbat(V)
VMC28 vs. IMC28
2.88
VMC30vs. IMC30
3.10 3.08
VBAT=4.2V VBAT=3.6V VBAT=3.2V
2.87
3.06
VMC28(V)@T=25 C
VMC30(V)@T=25 C
2.86
VBAT=4.2V VBAT=3.6V
3.04
o
3.02 3.00 2.98 2.96 2.94 2.92 2.90
o
2.85
VBAT=3.2V
2.84
2.83 0 50 100 150 200 250
2.88 0 50 100 150 200 250
IMC28(mA)
IMC30(mA)
VMC28 vs. Vbat
2.880
VMC30 vs. Vbat
3.088 3.084 3.080 3.076 3.072 3.068 3.064 3.060 3.056 3.0
2.876
2.872
2.868
2.864
2.860
2.856
2.852 3.0
3.5
4.0
4.5
5.0
VMC30(V)@VMC30=50mA
VMC28(V)@VMC28=50mA
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VA_SW28 vs. I A_SW28
2.828
3.34
VA_SW33 vs. I A_SW33
2.824
3.33
2.820
VBAT=4.2V
VA_SW28(V)@T=25 C
VA_SW33(V)@T=25 C
2.816
VBAT=3.6V VBAT=3.2V
VBAT=4.2V VBAT=3.6V
3.32
o
o
VBAT=3.4V
3.31
2.812
2.808
3.30
2.804
2.800 0 10 20 30 40 50
3.29 0 10 20 30 40 50
IA_SW28(mA)
IA_SW33(mA)
VA_SW28 vs. Vbat
3.332
2.828
VA_SW33 vs. Vbat
2.824
3.328
VA_SW28(V)@VA_SW28=5mA
2.820
VA_SW33(V)@VA_SW33=5mA
3.324
2.816
3.320
2.812
3.316
2.808
3.312
2.804
2.800 3.0
3.5
4.0
4.5
5.0
3.308 3.0
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
VIBR18 vs. IIBR18 VIBR32 vs. IIBR32
1.820
3.300 3.275
1.815
3.250
VIBR18(V)@T=25 C
VIBR32(V)@T=25 C
1.810
VBAT=4.2V VBAT=3.6V
3.225 3.200
o
VBAT=4.2V VBAT=3.6V
o
1.805
VBAT=3.2V
VBAT=3.4V
3.175 3.150 3.125
1.800
1.795
1.790 0 50 100 150 200 250
3.100 0 50 100 150 200 250
IVIBR18(mA)
IVIBR32(mA)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VIBR18 vs. Vbat
1.816
VIBR32 vs. Vbat
3.25 3.24 3.23
1.814
VIBR18(V)@VIBR18=25mA
1.812
VIBR32(V)@VIBR32=25mA
3.5 4.0 4.5 5.0
3.22 3.21 3.20 3.19 3.18 3.17
1.810
1.808
1.806
1.804 3.0
3.16 3.0
3.5
4.0
4.5
5.0
Vbat(V)
Vbat(V)
VA Ripple Rejection vs. Frequency
70 65 60 55 50 45 40 35 30 1000 10000 100000
75 70
VTCXO Ripple Rejection vs. Frequency
VTCXO Ripple rejection(dB)
VA Ripple rejection(dB)
65 60 55 50 45 40 35 30 1000 10000 100000
Frequency(HZ)
Frequency(HZ)
Operation Current vs. Vbat
350
60
Shutdown Current vs. Vbat
All output ON
Operation Current(uA)
300
Shoutdown Supply current (uA)
50
40
250
VSIM and Vtcxo OFF, All others ON
30
20
200
10
150 3.0 3.5 4.0 4.5 5.0
0 0 1 2 3 4 5
Vbat(V)
Vbat(V)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VCORE12 Load Transient VCORE18 Load Transient
CH1: VCORE12 50mV/DIV
CH1: VCORE18 50mV/DIV
CH4: IVCORE12 100mA/DIV
CH4: IVCORE18 100mA/DIV
VA Load Transient
VTCXO Load Transient
CH1: VA 50mV/DIV
CH1: VTCXO 20mV/DIV
CH4: IVA 50mA/DIV
CH4: IVTCXO 10mA/DIV
VM28 Load Transient VM18 Load Transient
CH1: VM18 20mV/DIV
CH1: VM28 20mV/DIV
CH4: IVM18 100mA/DIV
CH4: IVM28 100mA/DIV
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VSIM18 Load Transient
VSIM30 Load Transient
CH1: VSIM18 20mV/DIV
CH1: VSIM30 20mV/DIV
CH4: I VSIM18 10mA/DIV
CH4: I VSIM30 10mA/DIV
VA_SW28 Load Transient VA_SW33 Load Transient
CH1: VA_SW28 20mV/DIV
CH1: VA_SW33 20mV/DIV
CH4: I A_SW28 20mA/DIV
CH4: I A_SW33 20mA/DIV
VIBR18 Load Transient
VIBR32 Load Transient
CH1: VIBR18 50mV/DIV
CH1: VIBR32 50mV/DIV
CH4: I VIBR18 100mA/DIV
CH4: I VIBR32 100mA/DIV
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
VMC28 Load Transient VMC30 Load Transient
CH1: VMC28 50mV/DIV
CH1: VMC30 50mV/DIV
CH4: I MC28 100mA/DIV
CH4: I MC30 100mA/DIV
VUSB Load Transient
Power ON
PWRIN=3.6V
CH1: VUSB 20mV/DIV
VA VD VIO
CH4: I MC28 10mA/DIV
Power ON
Power ON
PWRIN=3.6V VD VM2.8V
PWRIN=3.7V VMC VIBR
VSIM18
VSW_A
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
Audio Amplifier PSRR (Input to GND)
Mdia ek(M 63 ) e T T 18 P e S p R je R tio(P R ) (S D n l) ow r u ply e ction a S R W iffere tia @rip= 0m , R=8O mA =2, In t toG D V 20 V l h, v pu N
M T (M 6318) edia ek T
Audio Amplifier PSRR (Input Floating)
tia P er S pplyR ow u ejectionR tio(P R ) (S D a S R W ifferen l) @ rip=200m , R =8O m A =2, In t Floa g V Vl h, v pu tin
+ 0 -1 0 -2 0 -3 0 P S R R d B -4 0 -5 0 -6 0 -7 0 -8 0 -9 0 -1 0 0 -1 0 1 -1 0 2 2 0 5 0 10 0 20 0 50 0 F q e cy (H re u n z) 1 k 2 k 5 k 1k 0 2k 0
d B P S R R
+0 -1 0 -2 0 -3 0 -4 0 -5 0 -6 0 -7 0 -8 0 -9 0 -1 0 0 -1 0 1
T T TT TTTTTTTT T T
-1 0 2 2 0
5 0
1 00
20 0
50 0 F q e (H re u ncy z)
1 k
2 k
5 k
1 0k
20 k
THD+N vs Frequency
M Tek(M edia T6318) TH + vs. Frequ cy(D DN en ifferen l) tia @ l =8O m P =250m , A =2 R h , out Wv
M Tek(M edia T6318)
THD+N vs Output Power
TH +Nvs. P er (D D ow ifferen tial) @ l =8O m 1kH A =2 R h , z, v
1 0 5 2 1 T H D + N % 0.5 0.2 0.1 05 .0
% T H D + N
1 0 5 2 1 0.5 0.2 0.1 05 .0 02 .0 01 .0 00 .0 5 00 .0 2 00 .0 1 1m 0 2 0m 50 m 1m 00 P e (W ow r ) 20 0m 50 0m 1 2
Vbat=5V Vbat=4V Vbat=3.3V
02 .0 01 .0 00 .0 5 00 .0 2 00 .0 1 2 0 50 10 0 20 0 50 0 F q ncy (H re ue z) 1 k 2 k 5 k 1 0k 2 0k
2 STEP RTC
0.90
DC/DC Efficiency for BL
1.4 Reverse current VRTC 1.2 1
0.88
1
0.8
Reverse current(uA)
VOUT=12V,IOUT=20mA
0.4
0.6 0.4
Efficiency
0.8
Vrtc(V)
0.6
0.86
0.84
0.2 0.2 0 2.8 2.4 2 1.6 1.3 1.1 0.9 0.7 0.4 0 0
0.82
0.80 3.2 3.4 3.6 3.8 4.0 4.2
VBAT(V)
Vbat(V)
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Preliminary Information
Confidential A ()
MT6318 PMIC Specification
Datasheet
Electrical Characteristics (continued)
Charger Enable Charger Disable
AC=5V
AC=5V
GDRVAC ICHARGE 200mA/DIV
GDRVAC ICHARGE 200mA/DIV
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Confidential A ()
MT6318 PMIC Specification
Datasheet
3
Pin Assignments
2
Figure 2: MT6318 TFBGA 96(7x7 mm ) Pin Assignments
1 A B C D E F G H J K
LED_KP
2
C2+
3
C1+
4
C1+
5
6
7
8
9
10
BAT_ BACKUP
PWRIN4 FB_BL
BLDRV PWRIN3 PWRBB
A B C D E F G H J K
VO_G
VO_R
CS_KP
DC_OV PWRIN4 CS_BL
RST CAP GND4
PWRIN3
INT
BAT_ON
V_USB
VO_B
GND4
GND4
PWRIN4
GND4
PWRIN3
RTC _SEL
VIO
USB
GDR VUSB GDR VAC
GND1
GND4
PWRIN4
GND4
GND3
GND3
PWRIN2 PWRIN2
AC
GND1
GND1
GND3
GND3
VD_ SEL
VA_SW
VBAT
ISENSE
GND1
GND1
GND3
SPICS
RESET
VIBR
VN
SEL2
GND1
GND1
GND2
GND2
GND2
SPICK
SRCLK EN SIM VCC SRST
VRTC
VTCXO
SEL1
SEL1 _EN
GND2
ISENSE _OUT AUDP
GND2
GND2
SIO
SIM RST VD
PWRIN1 PWRIN1 PWRIN1 VB_OUT
AUDN
SIMIO
SPIDAT
VA
BP/REF
VMC
VM_ SEL
SPK+
SPK-
PWR KEY
VSIM
SIM CLK
SCLK
1
2
3
4
5
6
7
8
9
10
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MT6318 PMIC Specification
Datasheet
Table 10: MT6188 Pin Descriptions Pin Control K7 A9 G9 H9 B10 B4 K4 H3 C9 E9 Charger Control E1 D1 C1 PWRKEY PWRBB SRCLKEN SIMVCC BAT_ON DC_OV VM_SEL SEL1_EN RTC_SEL VD_SEL I I I I I I I I I I Power on button input. Active low. Power on/off from microprocessor. Active high. VTCXO and VA enable. High = enable. Low = disable. VSIM enable. High = enable. Low = disable. Indication that Li-ion battery is inserted. High = no battery. Low = battery inserted. DC/DC protection input. OV threshold voltage is 1V. External memory supply selection. 1 = 2.8V, 0 = 1.8V. Enable the "pre-charge indication" function. 1 = enable, 0 = disable. (Note1) VRTC output voltage selection. 1 = 1.5V, 0 = 1.2V (Note1) VD output voltage selection. 1 = 1.8V/1.5V, 0 = 1.2V/0.9V (depending on the register PWR_SAVE_SPI setting). AC-DC adaptor input USB power input 3.3V USB power output Interrupt PIN. Active low. This pin informs the BB if an AC or USB voltage is detected, or if OVP (AC > 9V) is detected. Is reset to normal high after BB has communicated with the PMIC through the SPI. Control output to the gate of the external p-channel FET for the USB charger. Control output to the gate of the external p-channel FET for the AC charger. Charger current sensing input Control output to the gate of the external PMOS for the AC charger input as power source. Control output to the gate of the external PMOS for the VBAT input as power source. Non level-shifted SIM data (3V) Non level-shifted SIM reset input (3V) Non level-shifted SIM clock input (3V) Level-shifted SIM data (1.8/3V) Level-shifted SIM reset output (1.8/3V) Level-shifted SIM clock output (1.8/3V) Reset delay time capacitance System reset. Low active.
Page 29 of 64
Symbol
Input (I), Output (O), or Analog (A)
Description
AC USB VUSB
IA IA OA
B9
INT
O
D2 E2 F2 H2 G2 SIM Interface J7 H10 K9 H8 J9 K10 Reset B7 F9
GDRVUSB GDRVAC ISENSE SEL1 SEL2
OA OA OA OA OA
SIMIO SIMRST SIMCLK SIO SRST SCLK RSTCAP RESET
I/O I I I/O O O IA O
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Power-Related F1 J1, J2, J3, D9, D10, A8, B8, C8, A5, B5, C5, D5 J4 H5 K2 D3, E3, E4, F3, F4, G3, G4, G5, G6, G7, H4, H6, H7, D7, D8, E7, E8, F7, C3, C4, C6, C7, D4, D6 J10 C10 K1 E10 H1 G1 K8 G10 K3 Miscellaneous F10 A3 A4 A2 A10 Speaker Amplifier J5 J6 K5 K6 LED Driver B2 B1 C2 A1 B3 A7 B6 A6 SPI Interface F8 G8 J8 VO_R VO_G VO_B LED_KP CS_KP BLDRV CS_BL FB_BL SPICS SPICK SPIDAT
Confidential A ()
MT6318 PMIC Specification
Datasheet
VBAT PWRIN VB_OUT ISENSE_OUT BP/VREF GND VD VIO VA VA_SW VTCXO VM VSIM VRTC VMC VIBR C1+ C1C2+ BAT_BACKUP AUDP AUDN SPK+ SPK-
IA IA OA OA OA
Battery input voltage Power input Battery output voltage. Switchable. ISENSE output voltage. Switchable. Bandgap reference and bypass capacitance Ground
OA OA OA OA OA OA OA OA OA OA A A A OA IA IA OA OA IA IA IA OA IA OA IA IA I I IO
Digital core supply Digital IO supply Analog supply Auxiliary analog supply. Switchable. TCXO supply Memory supply SIM supply RTC supply Memory card supply Vibrator driver Charge pump capacitor. Positive terminal. Charge pump capacitor. Negative terminal. DC/DC output back-up capacitor. Positive terminal. Backup battery pin for 2-step RTC Audio positive input Audio negative input Speaker positive output Speaker negative output R LED current driver G LED current driver B LED current driver KP LED driver KP LED current sensor Control output to the gate of the external FET for the backlight DC-DC converter. Voltage sensor input for external BL FET current Voltage sensor input from white LED ballast resistor Serial port select input Serial port clock input Serial port I/O
Note1: The state of these pins is latched when MT6318 starts up. The state can changed only by powering down and powering up MT6318 again.
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MT6318 PMIC Specification
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4
Introduction
4.1
Overview
This document describes the specifications for the MT6318 power management IC (PMIC), including its functional requirements and electrical characteristics. MT6318 supports the MT621x series baseband chips for multimedia phones, GPRS phones and color LCD GSM-only phones. To complete a GSM/GPRS mobile handset, where power saving is a paramount issue, a device that supports powerrelated functions and control by the MMI is required. This functional block must support the following main features: 1. 2. 3. 4. 5. 6. 7. Low drop-out (LDO) regulators, Switching DC/DC and charge pump with high operation efficiency and low standby currents, Power-on reset and start-up timers, Battery charging circuits, Thermal overload protection, Under-voltage lockout protection, and, Over-voltage lockout protection.
For the MT621x series baseband chips, PMIC provides the following supply voltage and current and functionality to complete a GSM/GPRS mobile handset: A. B. C. D. Power source: one Li-ion battery cell Charger for the Li-ion battery Power-up sequencer and protection logic Eleven low drop-out regulator outputs Table 11: LDO Regulators Item 1 2 3 4 5 6 7 8 9 10 11 VD VMC VIO VA VA_SW VRTC VM VSIM VTCXO VUSB VIBR LDO Voltage * 1.8V/1.5V / 1.2V/0.9V 2.8V / 3.0V 2.8V 2.8V 2.8V / 3.3V * 1.5V / 1.2V 1.8V / 2.8V 1.8V / 3.0V 2.8V 3.3V 1.8V / 3.2V Current 200 mA 250 mA 100 mA 150 mA 50 mA 0.6 mA 150 mA 20 mA 20 mA 20 mA 200 mA Digital core Memory card (MS, SD, MMC) Digital IO Analog and mixed signal Auxiliary analog circuit Real-time clock External memory, selectable SIM card, selectable 13/26 MHz reference clock USB IO Vibrator Description
* The VD LDO and VRTC LDO have options available. * * VD output voltage can be configured as 1.8 V or 1.2 V. The 1.5 V and 0.9 V are power-down modes that can be controlled either by the SRCLKEN pin or by the PWR_SAVE_SPI software register. VRTC output voltage can be configured as 1.5 V or 1.2 V.
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E.
Four LED drivers: Table 12: LED Drivers Regulator LED_R LED_G LED_B LED_KP Type Current regulator Current regulator Current regulator Voltage feedback current regulator Current 12/16/20/24 mA 12/16/20/24 mA 12/16/20/24 mA 80 mA Description Drives the red LED Drives the green LED Drives the blue LED Drives the keypad LEDs
The output current ratings for the above regulators already include a 50% margin on their nominal current consumption, e.g. if a regulator output is listed as 150 mA, the peak consumption current is 100 mA. In the active state, the phone consumes peak output current at each regulator, which must be considered for the thermal design. F. LCD backlight white LED driver control To avoid a high-voltage process, only the control part is implemented in this PMIC. The external driver capability is specified as follows in Table 13. Table 13: LCD Backlight Driver Driver V_BL Type DC/DC switch, using inductor Current 80 mA Description Drives the white backlight LEDs
G. 400 mW single channel audio amplifier H. SPI 3wire interface
4.2
Term BB ESD HBM LDO OV OVP PMIC PSRR UV
Terms and Definitions
Definition Baseband chip Electrostatic discharge Human body model Low drop-out regulator Over-voltage protection, for when the battery voltage exceeds a set threshold. Over-voltage protection, for when the charger voltage exceeds a set threshold. Power management integrated chip Power supply rejection ratio Under-voltage
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5
Functional Description
5.1
General
Power management is one of the most important functions in this PMIC. The power management function applies proper management procedures and control functions to the mobile handset's battery, charger, and power supply. More specifically, the management criterion is to provide power to the mobile phone while extending the standby/active time as long as possible. To describe more clearly the functionality of the PMIC, the operation state diagram of a typical mobile phone is illustrated in Figure 3. The block diagram implemented in PMIC is shown further below to describe the relationships between different states. Figure 3: Power Management State Diagram
RTC alarm RTC alarm
Charging complete Charging complete
Switched Off, No Charging
Switched Off, Charging
PwrKey on/off
Active / Standby, Charging
PwrKey on/off
Active / Standby, No Charging
VBAT > 3.3V
Charger on/off
Charger off
RTC alarm
Charger off
Charger on/off
Charger on
Switched Off PreCharging New battery attached RTC alarm Snooze UV=1
PwrKey on/off
Active Active
RTC alarm key-active
NO DISCLOSURE
Active Alarm UV=1 Charger on/off UV=1 UV=1 Power Off
SR-CLK-EN on / -off
Standby
Note that the above diagram includes many software activities. PMIC reacts to only part of the states. The state diagram can be then simplified as follows:
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Figure 4: PMIC Hardware State
PwrKey on/off
VBAT > 3.3V
(unistar
Charger on/off Charger on/off Switched Off PwrKey on/off Active
SR-CLK-EN on / -off
Switched Off, Charging
Active / Standby, Charging
Charger on
PreCharging New battery attached UV=1 UV=1
Standby
Charger on/off
UV=1
Power Off
Table 14: Phone State Descriptions State Power Off Switched Off Pre-Charging Description No battery is connected, or a battery is connected but the battery is deeply discharged, i.e. VBAT < 3.3 V. In this state, only the VRTC LDO is enabled. VRTC is disabled when VBAT < 2.5 V. A battery is connected to the phone but the phone is switched off. The battery voltage is higher than 3.3 V. In this state, VRTC is enabled, and all other LDOs are disabled. The charger is connected to the mobile, but VBAT < 3.3 V. Slow charging is activated by the PMIC charger circuits. Charging at 50 mA constant current. When VBAT is charged up to 3.3 V, the detection circuit in PMIC enables normal charging and pulls the UV signal low, and enables all LDO outputs. The phone is powered up but the 13 MHz reference clock is disabled, part of the BB chip runs on the 32 kHz clock. In this state, the VTCXO LDO is disabled; the VD, VIO, VM, VA and VRTC LDOs are enabled. The phone is powered up and running on the 13 MHz reference clock. All LDOs are enabled, and the mobile radio task is running. The phone is woken up via the RTC alarm, and all LDOs are enabled, but only the alarm task is scheduled. No radio activities are scheduled. The mobile has a charger connected, the BB chip is active and running on the 13 MHz reference clock but only charging software is scheduled, no radio nor MMI tasks are activated. The LCD screen only shows the battery charging status. The mobile has a charger connected, the BB chip is active and running on the 13 MHz reference clock with regular mobile radio and MMI tasks activated. The LCD screen shows the battery charging status and all normal tasks.
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Standby
Active Active Alarm Switched Off, Charging Active, Charging
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Table 15: Extreme Case Definitions Term Under voltage (UV) Definition When PWRIN < 2.9 V in the switched-on condition (active or idle). PMIC goes to the power-off state.
Over voltage protection When AC > 9.0 V, a hardware over voltage protection circuit (OVP) is activated to turn (OVP) off charging. The charger status register D7 is set to 1 when OVP occurs. PMIC keeps charging off until the AC voltage returns to the normal range. Over voltage (OV) When VBAT > 4.3 V, a hardware over voltage protection circuit (OV) is activated to turn off charging. PMIC keeps charging off until VBAT returns to the normal range. Normally VBAT does not exceed 4.2 V during charging, but if something wrong happens during charging, OV protects the battery pack from being overcharged. Thermal overload (THR) Thermal overload protection function. When phone is in the active state and PMIC reach the overheating condition then PMIC shuts down completely.
Table 16: LDO Turn On Table Conditions PWRIN < 2.5V UV (PWRIN) Operations VD, VIO, VM
SRCLKEN
PWRKEY
PWRBB
VTCXO
CHDET
L L L
H H L
X X L
X X H
X X L
X X X H
H L L L L L L L L L
Off Off Off On Off On Off On
Off On On On
Off Off Off
VA_SEL/VB_OUT = 0, VA = VD VA_SEL/VB_OUT = 1, VA = VTCXO
Off Off Off
Off Off Off
Off Off Off
Off Off Off
Off Off Off
VA_SW = 0 Off VA_SW = 1, VA VA_SW = 0 Off VA_SW = 1, VA VA_SW = 0 Off VA_SW = 1, VA VA_SW = 0 Off VA_SW = 1, VA VA_SW = 0 Off VA_SW = 1, VA VA_SW = 0 Off VA_SW = 1, VA
On USB_PWR VMC SIMVCC On USB_PWR VMC SIMVCC On USB_PWR VMC SIMVCC On USB_PWR VMC SIMVCC On USB_PWR VMC SIMVCC On USB_PWR VMC SIMVCC Off Off Off Off
L
L
H
X
X L H
VA_SEL/VB_OUT = 0, VA = VD On VA_SEL/VB_OUT = 1, VA = VTCXO
On
VA_SEL/VB_OUT = 0, VA = VD VA_SEL/VB_OUT = 1, VA = VTCXO VA_SEL/VB_OUT = 0, VA = VD VA_SEL/VB_OUT = 1, VA = VTCXO VA_SEL/VB_OUT = 0, VA = VD
L
L
X
L
X L H
L
L
X
X
H L Off Off
On
VA_SEL/VB_OUT = 1, VA = VTCXO VA_SEL/VB_OUT = 0, VA = VD VA_SEL/VB_OUT = 1, VA = VTCXO
H
X
X
X
X
X
On
Off
Off
* * *
`X' means either high or low; the setting does not matter. During pre-charging, an external switch can be used to supply power to the LDOs (VD, VIO, VM, VRTC, VA and VTCXO). The USB LDO regulates PWRIN to 3.3 V for the BB (USB IO). The VUSB 3.3 V LDO output on/off follows the control bit USB_PWR (Register 1 [3]). When the USB_PWR control bit is set to "off", the VUSB output voltage must drop below 0.3 V within 1 ms. (VUSB output is shunt with a 1 F capacitor.)
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VA_SW
VUSB
VRTC
VSIM
VMC
THR
VA
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5.2
State Timing
In this section the power on/off, wake up, charging and reset sequences are described in detail. For the following timing diagrams, the phone state is shown in the x-axis, and the y-axis shows the related signals. The text above represents the transition events. Figure 5: Power Key State Timing
Battery Set CHRDET UV OV PWRKEY RESET PWRBB SRCLKEN VA, VTCXO VD, VIO, VM Min. 0.5S Mask Min. 0.5S Min. 0.5S Pwr Key Pressed Stand -By Pwr Key Pressed Charger Plug-in Pwr Key Pressed Charger Un-Plug
Phone Off
Switch Off
Reset Seq.
Active
Stand -By
Pwrdown Seq.
Switch Reset Off Seq.
Stand Switch Reset Active / Stand -By Seq. Charging -By / Off / Charging Charging
Figure 6: State Timing for Wake-up, Paging and Standby
RTC Alarm Wake-up Battery Set CHRDET UV OV PWRKEY RESET PWRBB SRCLKEN VA, VTCXO VD, VIO, VM Min. 0.5S RTC Alarm Wake-up Snooze Or off Charger Paging Wake-up Charger Plug-in Pwr Key Pressed Un-Plug
Phone Off
unistar)
Switch Off Reset Active Stand Reset Alarm Switch Seq. -By Active Seq. Active Off Alarm /Active Stand Active/ -By Active / Switch Charging -off Seq.
Switch Off / Charging
Switch Off
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Figure 7: Charger State Timing
Charging Complete Charger Charger Plug-in Low-bat UnPlug Vbat<3.4V Value
Battery Charger Set Plug-in CHRDET
Charging Complete
Charger UnPlug
Pwr Key Pressed
CC CV UV
CC CV
SW Det
Chren
PWRKEY RESET PWRBB SRCLKEN VA, VTCXO VD, VIO, VM OV Phone Off Phone Off Phone Pre Off Charging Reset Switch Switch Switch Off/ Seq. Off / Off Charging Charging Complete Active Active Active Active Switch Charging Off Active complete Charging Min. 0.5S
Reset Seq.
*Chren is PMIC internal signal
Figure 8: Reset Timing
Pwr Key Pressed Switch-On PWRKEY Pwr Key Pressed Switch-Off Alarm Wake-up
PWRBB Switch-On Reset Delay 2.0mS/nF Switch-Off Reset Delay TBD mS Switch-On Reset Delay 2.0mS/nF
RESET
VD, VA, VIO VTCXO, VM
Ramp-up Time TBD ms
Ramp-up Time TBD ms
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To describe each block of the PMIC in detail, the overall hardware block diagram of PMIC is depicted in Figure 9. More detailed descriptions for each sub-block are provided in the following sections. Figure 9: PMIC Block Diagrams
SPIDAT SPICK SPICS AUDN AUDP
Audio Amplifier 800mW Digital Core, 1.8/1.2V, 200mA
USB AC
GDRVAC GDRVUSB
ISENSE 0.2 VBAT
ISENSE_OUT VB_OUT GND
AC/USB Charger CHR_EN Detector and Status Control
SPK+, SPK-
VD
SW
BAT_ON INT SEL2
Memory LDO 1.8/2.8V, 150mA VTCXO LDO 2.8V, 20mA VM
PWRBB PWRKEY SRCLKEN
SPI Control Logic, Power Up/Down Protection, Dim Control
Digital IO LDO 2.8V, 100mA Analog LDO 2.8V/3.3V/50mA 2.8V, 150mA
VIO
VA_SW VA
VM_SEL
VTCXO
SEL1
RESET PWRIN
BLDRV CS_BL FB_BL DC_OV VIBR LED_R/G/B C1+,C1 C2+ Vibrator LDO 1.8/3.2V, 200mA RGB current sinking (20mAx3) DC/DC Booster Control Control VSIM_SEL VIBR_ON Control
RTC Voltage 1.5/1.2V, 0.6mA MC LDO 2.8/3.0V, 250mA SIM LDO 1.8/3.0V, 20mA VUSB LDO 3.3V, 20mA KP current source (80mA)
VRTC
VMC SIMVCC VSIM
V_USB
LED_KP CS_KP SIO SRST SCLK
NO DISCLOSURE
SIMIO SIMRST SIMCK SIM RST, CLK, Data
Charge Pump 80mA
5.3.1
Charger Circuit
The charger circuit in PMIC is mainly comprised of 3 sub-functions. Figure 10 shows the block diagram of the charger in detail.
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Figure 10: PMIC Charger Block Diagrams
5.3.1.1
Charger Detector
The charger detector senses the charging voltage from either a standard AC-DC adaptor or a USB connection. When the charging input voltage is greater than the pre-determined threshold, the charging process is triggered. This detector resists higher input voltages than other parts of the PMIC; i.e. if an excess charging source is detected (> 9.0 V), the charger detector stops the charging process to avoid burning out the whole chip or even the whole phone. If both AC and USB chargers are detected, the charging source uses the AC source. When the presence of a charger voltage (either AC or USB) is detected, an interrupt output pin INT becomes active (pull LOW). The INT is also active when the AC or USB regulator is removed. The PMIC resets INT to HIGH after the BB chip reads the PMIC through the SPI. 5.3.1.2 Charger Control
When the charger is on, this block controls the charging phase and turns on the appropriate LDOs according to the battery status. The battery voltage is constantly monitored: if the voltage is greater than 4.3 V, charging is stopped immediately to prevent permanent damage to the battery. In CC mode, several charging currents can be set by programming Register 1 [2:0]. When AC charging, the charging current can be up to 800 mA. When USB charging, the charging control first clamps the charging current to 87.5 mA. After the BB communicates with the USB host and if the power class is announced as 450 mA, the BB sets the register via SPI, and the PMIC charger releases the charging current limit to 450 mA. For more details, refer to Table 25.
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The BB can disable the USB task by setting Register 1 [1] (USB_PWR) to 0 via the SPI. After the USB regulator shuts off the USB host is virtually disconnected while the charging process resumes its previous state. If the phone is in the switched-off state before USB power is inserted, the BB must wake up to determine the USB power class. The other case is when the phone is in the switched-on state before USB power is inserted. The already-awake BB must determine the USB power class for proper charging as well as for the USB data transfer operation. The MMI allows the user to utilize the USB simply as a charger only, as described above. Due to process variation, the charging current may vary form chip to chip. To compensate for this variation, an offset value is set in the PMIC. The PMIC reads this compensation value and applied the charging current offset when the phone is in the charging state. This compensation value may be calculated during the phone production calibration process, or it may be constantly observed by the BB while the phone is charging. The offset value is set by the BB software (Register 10 [2:0]).
5.3.1.3
Control for Pre-Charge Indication
The PMIC provides 2 control signals SEL1 and SEL2 for the application that shows pre-charge status on the LCD. In normal cases, VBAT is selected (SEL2 turned on) as the power input to the PMIC. Under battery low conditions (VBAT < 3.3 V), the AC charger source is selected (SEL1 turned on) to substitute for the power normally provided by VBAT, allowing the BB to power up and at least light up the LED to show the charging status. However, if customers do not connect the two external switches, the pre-charging status is not displayed. SEL1 is turned on only in the pre-charging state, SEL1 and SEL2 must not be turned on simultaneously at any time. During the pre-charging state, when VBAT passes 3.3 V, the PMIC switches SEL1 off and SEL2 on to have the VBAT supply the whole system as under normal conditions. Table 17 lists the SEL 1 and SEL 2 states for each phone state.
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Table 17: SEL1 and SEL2 Settings for Each Phone State
Initial Phone State Not Charging Switched on, idle
Initial Charging State
Condition
Description
PMIC Settings
X (Not charging)
Switched on, talking Powered off, switched off Switched on, talking Switched on, idle
X (Not charging) X (Not charging) Normal charging CC mode charging Normal charging
VBAT > 3.3 V VBAT < 3.3 V VBAT = 3.3 V PWRIN = 2.9 V VBAT > 3.3 V VBAT = 3.3 V X
Can make a phone call SEL2 on Low battery warning every 30 s Software shutdown PMIC shutdown Talking Call dropped low battery warning every 30 s X
X
Switched On, Charging VBAT 3.3 V Talking VBAT < 3.3 V Call dropped PWRIN 2.9 V In idle SEL2 on return to idle A different charging current can be selected via the SPI in CC mode. CC mode charging at 50 mA CC mode charging at 50 mA
Switched Off, Charging Powered off Pre-charging VBAT < 3.3 V Pre-charge and power-on key disabled Pre-charge and power-on key enabled SEL1 on
Powered off switched off transition
Pre-charging
VBAT = 3.3 V
Switched off
Normal charging
VBAT > 3.3 V
Only charger task is activated.
SEL1 off (delay) SEL2 on. During this transient, pre-charging is ongoing. SEL2 on
A different charging current can be selected via the SPI in CC mode.
When charging the PMIC uses GRVAC and GDRVUSB pins to control the current flow through the external MOSs, and at the same time maintains the current control loop by sensing the voltage drop ISENSE across the external current sensor resistor (0.2 ). Note that the charging current limit is 450 mA for USB and 800 mA for AC. Battery charging states include No Charge mode, Constant Current (CC) charge mode (pre-charge, constant current), and Constant Voltage(CV) charge mode (Figure 11). No matter what state the phone is in, the PMIC charger handles the charging state transition and reflects the status in Register 0 (charger status) for the BB to read.
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Figure 11: Charging States Diagram
Pre-Charge CC Charge is set by software checking VBAT voltage.
CC Charge Mode
VBAT < 3.0V CV=0 (<3.85V)
CC Charge Pre-Charge
VBAT >3.3V
CV=1 (>4.2V)
CHR-DET=1 BAT_ON = 0 CHR_EN =1 OV = 0 CV = 0 (<4.2V)
CV Charge Mode
CHR_DET=1 BAT_ON = 0 CHR_EN =1 OV = 0 CV = 1 (>4.2V)
In No Charge mode, BB resets all SPI settings which were set by BB before.
No Charge Mode
CHR_DET w/o BAT, or BAT w/o CHR_DET, or OV, or CHR_EN=0.
PMIC remains in CV mode charging until BB stops charging by setting CH_EN=0. BB sets CH_EN=1 after receiving the next INT, or VBAT < 3.85V (or TBD).
Table 18: Charger State Transition
Current State No Charge
Transition Conditions CHR_DET = 1, CV = 0, BAT_ON = 0 CHR_DET = 1, CV = 1, BAT_ON = 0 CHR_DET = 0 BAT_ON = 1 CV = 1 CHR_DET = 0 BAT_ON = 1 CV=0
Next State CC Charge mode CV Charge mode No Charge mode CV Charge mode No Charge CC Charge mode
CC Charge
CV Charge
Note: CHR_DET is internal used bit in PMIC, which is related to USB_DET or AC_DET according to the table in below:
Table 19: CHR_DET Internal Bit
AC_DET 0 0 1 1 Illegal charger Illegal charger
USB_DET 0 1 0 1 0 1
CHR_DET No charging USB regulator for charging AC regulator for charging AC regulator for charging No charging No charging
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The BB can stop the charging by setting CHR_EN (Register 1 [7]) to 0 via the SPI, this means that although PMIC handle the charging process automatically, BB is the true master to manage the charging process. This control mechanism allows the BB to command the PMIC doing elegant trickling charging if necessary. Pin BAT_ON (Register 0 [5]) turns off the charger immediately if the pin goes high (> 2.50.1 V). This function is designated to block the charger input in case the battery is accidentally removed. During charging, the disconnection of the battery might cause the VBAT voltage to surge, damaging the chip before the over-voltage protection can be turned on. Note that UV is the internal signal that indicates the too-low condition of the battery voltage. The high-to-low UV threshold can be set in the 2-bit UV_SEL register with 2.9V/2.75V/2.6V/2.5V settings. The low-to-high threshold UV is 3.2 V. The hysteresis prevents the state from bouncing back and forth between pre-charge and other states. Recall that UV serves as the under voltage lock up signal (Figure 4). When UV=1, the battery is too weak to sustain an eligible phone call, therefore the PMIC moves into the powered-off state. To provide a pleasant user interface, in the switched on condition, the BB chip monitors the battery voltage: once VBAT is less than 3.3 V, the MMI issues an alert sound and/or displays a battery low message on the LCD to inform the user. For phones using this PMIC, the alert sound may be any user-specified chime rather than by traditional alerter. Table 20 shows the charging states, and their responses to various conditions.
Table 20: Charging Control
State No charging Charger detection Pre-charging CC charging CV charging Pause charging Emergency stop Note:
CHR_EN
CHR_DET
VBAT < 3.3/3.0 V
CV (VBAT > 4.2 V)
BAT_ON (battery inserted)
Operation Wait for CHR_DET transition Wait for CHR_EN Monitor UV and CHR_DET (see Note) Monitor CV and CHR_DET Monitor CHR_DET No charge; keep the current state. (For BB to emulate trickle charge) Turn off charger powered off state
X L X H H L X
L H H H H H H
X L H L L X X
X X L L H X X
L L L L L L H
The threshold voltage to determine the VBAT signal is 3.3 V for pre-charge state to CC mode, and 3.0 V for returning to pre-charge mode. This hysteresis is designed to prevent the state from bouncing back and forth between charge modes in events such as a surge of current demanded.
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Figure 12: I-V Curve of Li-Ion Battery Charging
CHREN
1.0A
AC
0.5A Charge Current 50mA
4.2V Battery Voltage VBAT Li-ion Cell Voltage 3.3V CC Pre-Charging Charging CV Charging Charge Complete Time
Table 21: Operation for Different Charging Sources
AC Off Off
USB Off On
Phone State Any state Power off
Operation No charging. Use USB to start pre-charge and turn on USB regulator. No matter what power class the USB attached can provide, PMIC charges the battery with constant pre-charge current. Since the BB is still off, no charge status is shown. Use USB as the charging source. Turn on (VTCXO, VM, VD, VIO, VA) LDOs and USB regulator, then the BB triggers the USB function to determine the host's power class. After the BB sets the appropriate current limit, then the PMIC starts normal charging procedure and BB runs the charging management task to display the charging state. Use USB as the charging source. First initiate the USB function to determine the host's power class. After the BB sets the appropriate current limit, then the PMIC starts normal charging procedure and BB runs the charging management task to display the charging state. Start pre-charge. Use SEL1 to select the AC charger source for PWRIN then turn on (VTCXO, VM, VD, VIO, VA) LDOs. BB runs the charging management task to display the charging state. Turn on (VTCXO, VM, VD, VIO, VA) LDOs. BB runs the charging management task to display the charging state. Follow normal charging procedure. Use AC to start pre-charging. Can also use SEL1 to select the AC charger source for PWRIN. Turn on (VTCXO, VM, VD, VIO, VA) LDOs. BB runs the charging management task to display the charging state. Turn on the USB regulator. Use AC as the charging source. Turn on (VTCXO, VM, VD, VIO, VA) LDOs to start normal charging procedure. BB runs the charging management task to display the charging state. USB regulator is turned on also. Use AC as the charging source to start normal charging procedure. USB regulator is turned on also.
Switch off
Switch on
On
Off
Power off
Switch off Switch on Power off
On
On
Switch off
Switch on
Note: The LDOs (VTCXO, VM, VD, VIO, VA) listed here are turned on/off by the PMIC itself. Other drivers like BL and RGB can be turned on via BB through SPI.
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5.3.2
Low Dropout Regulator (LDOs) and Reference
The MT6318 integrates eleven LDOs that are optimized for their given functions by balancing quiescent current, dropout voltage, line/load regulation, ripple rejection, and output noise. 1. Digital Core LDO (VD) The digital core LDO is a regulator that sources 200 mA (max) with a 1.8 V or 1.2 V output voltage selection based on the supply voltage requirement of the BB chipset. The LDO also provides 1.5 V/0.9 V power-down modes that can be controlled either by the SRCLKEN pin or by the PWR_SAVE_SPI software register (Register 8 [5]). The digital core LDO supplies the BB circuitry in the handset, and is optimized for a very low quiescent current. Digital IO LDO (VIO) The digital IO LDO is a regulator that sources 100 mA (max) with a 2.8 V output voltage. The LDO supplies the BB circuitry in the handset, and is optimized for a very low quiescent current. This LDO powers up at the same time as the digital core LDO. Analog LDO (VA) The analog LDO is a regulator that sources 150 mA (max) with a 2.8 V output voltage. The LDO supplies the analog sections of the BB chipsets and is optimized for low frequency ripple rejection in order to reject the ripple coming from the RF power amplifier burst frequency at 217 Hz. TCXO LDO (VTCXO) The TCXO LDO is a regulator that sources 20 mA (max) with a 2.8 V output voltage. The LDO supplies the temperature compensated crystal oscillator, which needs its own ultra low noise supply and very good ripple rejection ratio. RTC LDO (VRTC) st PMIC features a 2-step RTC that keeps RTC alive for a long time after the battery has been removed. The 1 LDO charges a backup battery on the BAT_BACKUP pin to ~2.6 V. Also, when the battery is removed, the first stage nd prevents the backup battery from leaking back to VBAT. The 2 LDO regulates the 2.6 V supply to a 1.5 V/1.2 V optional RTC voltage. The RTC voltage can be set by the RTC_SEL pin while the BB is alive; the setting is retained while the BB is powered down. When the backup battery is fully charged, the high backup battery voltage, low nd reverse current leakage and the low 2 LDO operating current sustain the RTC block for even tens of hours with the absence of the main battery. Memory LDO (VM) The memory LDO is a regulator that sources 150 mA (max) with a 1.8 V or 2.8 V output voltage selection based on the supply specs of the memory chips. The LDO supplies the memory circuitry in the handset, and is optimized for a very low quiescent current. This LDO powers up at the same time as the digital core LDO. SIM LDO (VSIM) The SIM LDO is a regulator that sources 20 mA (max) with a 1.8 V or 3.0 V output voltage selection based on the supply specs of subscriber identity module (SIM) card. The LDO supplies the SIMs in the handset, and is controlled independently of the other LDOs. Memory Card LDO (VMC) The memory card LDO is a regulator that sources 250 mA (max) with a 2.8 V or 3.0 V output voltage selection. The LDO supplies the memory card (MS, SD, MMC) in the handset, and is controlled independently of the other LDOs.
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2.
3.
4.
5.
6.
7.
8.
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9.
Auxiliary Analog Circuit LDO (VA_SW) The auxiliary analog circuit LDO is a regulator that sources 50 mA (max) with 2.8 V or 3.3 V output voltage selection based on the VA_SW_SEL register setting (Register F [7]). It can be switched on/off by register control.
10. USB IO LDO (VUSB) The USB IO LDO is a regulator that sources 20 mA (max) with a 3.3 V output voltage. The LDO output on/off follows the control bit USB_PWR (Register 1 [3]). When the USB_PWR control bit is set to off, the VUSB output voltage drops below 0.3 V within 1 ms. (VUSB output is shunt with a 1 F capacitor.) 11. Vibrator LDO (VIBR) The vibrator LDO is a regulator that sources 200 mA (max) with a 1.8 V or 3.2 V output voltage selection based on the VIBSEL register setting (Register E [1]). This LDO can be powered on/off by register control (Register 8 [0]). 12. Reference Voltage Output (VREF) The reference voltage output is a low noise, high PSRR and high precision reference with a guaranteed accuracy of 1.5% over temperature. The output is used as a system reference in MT6318 internally. However for accurate specs of every LDO output voltage, avoid loading the reference voltage; only bypass it to GND with a minimum 100 nF capacitance.
5.3.3
LED Drivers
PMIC provides 4 independent drivers. Three of them use an identical structure to drive 3 different LEDs (R, G, B). The fourth is dedicated to driving the keypad LEDs. The reason for separating the LED drivers into 2 groups is phone feature oriented. First, for the colorful backlight display when a call is incoming, three independent drivers can be used to blend many illuminating colors easily. Second, LEDs for a bar type phone's LCD and keypad normally do not turn on at the same time. Therefore a 2-step architecture is beneficial for pin count saving and power efficiency. The first common block for the keypad (KP) and R/G/B LED drivers is a switching capacitor type DC/DC (charge pump circuit) that boosts VBAT to 4.5 V (note VBAT < 4.2 V). This charge pump circuit features a driving capability control option for reduced current consumption and start-up inrush current. The KP LED driver is a voltage feedback type regulator available to supply 80 mA for up to 4 parallel KP LEDs. External ballast resistors are necessary and serially connected to each LED, but only one provides feedback voltage to the PMIC. Moderate variations in light intensity for different LEDs in the KP is not a critical issue, therefore this configuration is simpler and saves the PMIC on pin count. The R/G/B LED drivers are 3 identical current regulators (Figure 13). The 3 external LEDs connect their anodes to VBAT and their cathodes to 3 pins of the PMIC (LED_R/G/B). No ballast resistor is needed for these 3 LEDs; each current regulator is capable of setting its current to 12, 16, 20 or 24 mA via the control registers (Registers 3~5 [6:5]).
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Figure 13: LED Driver Block Diagram
VBAT
FB : Feed Back CS : current sense KP : Key Pad PD: Power Down DC/DC CNTL
Vbat
Vin
DR CS
BLDRV CS_BL DC_OV FB_BL
Vo = 4.3V For Id=20mA
R
1u /25V
R
PD Dim
OV FB
Dim_5
SPI
SPIDAT SPICk CS
Dim control
Dim_1 ~Dim_5 Dim_4 PD KP Vin regulator Vo FB
LED_KP CS_KP VBAT
PD
Charge Pump Regulator Vbat
Vbat
R
R
...
R
4.5 V
Vout Dim_3 Dim_2
CNTL R G B Current PD_B Sinking PD_G PD_R Vo_B Vo_G Vo_R
LED_RGB
C1+
C1C2
Dim_1
1uF/X5R
4.7uF
Adjustable Current Gauge (12,16,20,24) mA
5.3.4
Control for Backlight Driver
The backlight (BL) driver control is responsible for controlling the external boost DC/DC converter, which is required to drive up to 6 white LEDS (2 legs, 3 in series). BLDRV connects to the gate of the external MOSFET; CS_BL senses the current flow through the MOSFET, and FB_BL feeds the voltage drop on ballast resistor back to the PMIC for LED light intensity control. DC_OV helps prevent the over-voltage of the output.
5.3.5
Dimming Control
Brightness can be controlled by programming the MT6318's internal registers to change the driver's output pulse duty cycle and frequency. 5.3.5.1 Pulse Duty Cycle
For all drivers, the output duty cycle is adjusted by selecting the corresponding driver's PWM_D value according to the following relationship: (R/G/B/KP) PWM duty cycle = (PWM_D + 1) low's , and 32 - (PWM_D +1) high's; where PWM_D ranges from 0 to 31. 5.3.5.2 Frequency
For R/G/B and KP, the output frequency is changed by adjusting Register 9 [3:0] DIV value. All 4 LED drivers share the same DIV setting. The output frequency is governed by: (R,G,B,KP) PWM frequency = 800k / 25 / (DIV+1) / 32; where DIV ranges from 0 to15.
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For BL, the output frequency is changed by adjusting BL_DIV (Register 9 [7:4]) and also Bypass (Register 7 [5]). The output frequency is governed by: When bypass = 0, (BL) PWM frequency = 800k / 25 / (BL_DIV+1) / 32 When bypass = 1, (BL) PWM frequency = 800k / (BL_DIV+1) / 32 where BL_DIV ranges from 0 to 15.
5.3.6
Battery Voltage Monitor
PMIC outputs both VBAT and ISENSE voltage to VB_OUT and ISENSE_OUT pins. In addition, the divide-by-two option is supported. This function facilitates monitoring of the VBAT and ISENSE voltages by the BB, to control the charging process.
5.3.7
Speaker Amplifier
The speaker amplifier in MT6318 can be configured as either differential input or single-ended input. The amplifier is controlled by Register 2 [1]. The input must be AC-coupled. Refer to Register 1 [6:4] for the gain setting.
5.3.8
SPI
PMIC uses a 3wire interface to connect to the BB. This bi-directional serial bus interface allows the BB to write commands to and read status from PMIC. The bus protocol employs a 16-bit proprietary format. The descriptions for the 3 signals are listed in Table 22.
Table 22: SPI Definition
Signal Name SPICK SPIDAT SPICS
Attribute Edge triggered Level Active low
Direction BB PMIC BB PMIC BB PMIC
Description Serial bus clock Serial data PMIC SPI bus selection
When SPICS goes low, this bus is active. The BB transfers the 4 register index bits followed by a read/write bit, then waits 3 clock cycles for the PMIC SPI state machine to decode the operation for the succeeding 8 data bits. The state machine counts for 16 clocks to complete the data transfer. If fewer than 16 clocks are received during the time that SPICS = 0 then only part of the data has been transferred. On the other hand, if more than 16 clocks are received, the extra data is ignored. The first SPICK is started 100 ns after the SPICS is asserted low.
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Figure 14: SPI Bus Timing
t > 100 nsec
16 clocks
SPICK SPIDAT
R3 R2 R1 R0 R X X D7 D6 D5 D4 D3 D2 D1 D0
SPICS
Receive index
Register decode
Read register content
a. SPI read timing
t > 100 nsec
16 clocks
SPICK SPIDAT
R3 R2 R1 R0 W X X X D7 D6 D5 D4 D3 D2 D1 D0
SPICS
Receive index
Register decode
Write register content
SPICS = 1 PMIC reset SPI state machine
b. SPI write timing
*Read = BB reading from PMIC, Write= BB writing to PMIC
5.4
Register Table and Descriptions
See the next page for the register table (Table 23).
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Table 23: Register Control Table
Index 0
Name
Charger Status Charger / Speaker Control LDO Status R LED Driver G LED Driver B LED Driver KP LED Driver BL LED Driver
D7
OV_SPI R CHR_EN RW 1 VD R ON RW 0 ON RW 0 ON RW 0 ON RW 0 ON RW 0 CHR_PUMP _EN RW 0 BL_DIV3
D6
CHR_DET R AMPGAIN_2 RW 0 VA R CURLIM1 RW 0 CURLIM1 RW 0 CURLIM1 RW 0 Reserved
D5
BAT_ON R AMPGAIN_1 RW 0 VM R CURLIM0 RW 0 CURLIM0 RW 0 CURLIM0 RW 0 Reserved
D4
AC_DET R AMP_GAIN_0 RW 0 VRTC R PWM_D4 RW 0 PWM_D4 RW 0 PWM_D4 RW 0 PWM_D4 RW 0 PWM_D4 RW 0 VA_SEL RW 0 BL_DIV0 RW 0 Reserved
D3
USB_DET R USB_PWR RW 0 VTCXO R PWM_D3 RW 0 PWM_D3 RW 0 PWM_D3 RW 0 PWM_D3 RW 0 PWM_D3 RW 0 VMC RW 0 DIV_3 RW 0 OV_SPI_CLR W
D2
PWRKEY _DEB R CLASS_D2 RW 0 VSIM R PWM_D2 RW 0 PWM_D2 RW 0 PWM_D2 RW 0 PWM_D2 RW 0 PWM_D2 RW 0 VSIMSEL RW 0 DIV_2 RW 0 CHOFST[2] RW 0 UV_SEL[0] RW 0 Reserved
D1
CV R CLASS_D1 RW 0 AUDIO_SEL RW PWM_D1 RW 0 PWM_D1 RW 0 PWM_D1 RW 0 PWM_D1 RW 0 PWM_D1 RW 0 SPEAKER RW 0 DIV_1 RW 0 CHOFST[1] RW 1 Reserved
D0
CHRG_DIS R CLASS_D0 RW 0 DIM_CK_ON RW PWM_D0 RW 0 PWM_D0 RW 0 PWM_D0 RW 0 PWM_D0 RW 0 PWM_D0 RW 0 VIBRATOR RW 0 DIV_0 RW 0 CHOFST[0] RW 1 Reserved
1
2
3
4
5
6
Reserved
BYPASS RW 0 PWR_SAVE _SPI RW 0 BL_DIV1 RW 0 Reserved
7
VA_SW RW 0 BL_DIV2 RW 0 Reserved
8
Misc.
9
Dim Clock Charger Control 2 Bandgap Setting
LDO_ TEST1 _EN LDO_ TEST2 _EN
RW 0 Reserved
A
Reserved
Reserved
Reserved
Reserved
UV_SEL[1] RW 0
B
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
C
Reserved
Reserved
INT_DRV RW 1
RESET_DRV RW 1
Reserved
Reserved
Reserved
Reserved
D
E
Charge Pump Control Extras
PUMPCLCTRL PUMPDSEL_1 PUMPDSEL_0 PUMPSSEL_1 PUMPSSEL_0 RW 0 VA_SW_SEL RW 1 VBSSEL_ SPI[1] RW 0 RW 1 VBSSEL_ SPI[0] RW 0 RW 0 VBHSEL RW 0 RW 0 VMCSEL RW 0
Reserved
VIBSEL RW 0 PUMPDELAY [1] RW 1
USB_CHR_EN RW 0 PUMPDELAY [0] RW 1
Reserved
F
RW 0
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Table 24: Register Index 0: Charger Status Register
Register Index 0: Charger Status (Read Only) Bit D7 D6 D5 D4 D3 D2 D1 D0 Name OV_SPI CHR_DET BAT_ON AC_DET USB_DET PWRKEY_DEB CV CHRG_DIS Value 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Description Charger OV has not occurred (AC < 9V) Charger OV has occurred (AC > 9V) Charger not detected Charger detected Battery is connected Battery is not connected AC power not detected AC power detected USB power not detected USB power detected Debounced power key is asserted. Debounced power key is not asserted. Not in CV mode. In CV mode. Charging. Not charging.
Note: If CV = 0 and CHARG_DIS=0, then this the charger is in CC mode.
Table 25: Register Index 1: Charger/Speaker Amplifier Control
Register Index 1: Charger/Speaker Control Bit D7 D6~D4 D3 D2~D0 Name CHR_EN AMPGAIN[2:0] USB_PWR CLASS_D(2:0) Value 0 1 0~7 0 1 0 1 2 3 4 5 6 7 Description Pause charging Enable charging (Default) Speaker amplifier gain setting 0~21 dB (Default = 000) Turn off USB regulator (Default) Turn on USB regulator Charge current clamp to 50 mA Charge current clamp to 90 mA Charge current clamp to 150 mA Charge current clamp to 225 mA Charge current clamp to 300 mA Charge current clamp to 450 mA Charge current clamp to 650 mA Charge current clamp to 800 mA
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Table 26: Register Index 2: LDO Status
Register Index 2: LDO Status (Read Only) Bit D7 D6 D5 D4 D3 D2 D1 D0 VD VA VM VRTC VTCXO VSIM AUDIO_SEL DIM_CK_ON Name Value 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Description Digital LDO off Digital LDO on Analog LDO off Analog LDO on Memory LDO off Memory LDO on RTC LDO off RTC LDO on 13/26 MHZ VTCXO LDO off 13/26 MHZ VTCXO LDO on SIM LDO off SIM LDO on Fully-differential speaker amplifier input Single-ended speaker amplifier input Dimming clock off Dimming clock on. Set the register to 1 when DC-DC (BL LED) or Charge-pump or KPLED or RGB driver is enabled.
Table 27: Register Index 3: R LED Driver
Register Index 3: R LED Driver Bit D7 D6~D5 ON CURLIM(1:0) Name Value 0 1 0 1 2 3 0~31 Description Power down (Default) Power on Current limit = 12 mA (Default) Current limit = 16 mA Current limit = 20 mA Current limit = 24 mA Duty cycle = (PWM_D(4:0)+1)/32 (Default = 0)
D4~D0
PWM_D(4:0)
Table 28: Register Index 4: G LED Driver
Register Index 4: G LED Driver Bit D7 D6~D5 ON CURLIM(1:0) Name Value 0 1 0 1 2 3 0~31 Description Power down (Default) Power on Current limit = 12 mA (Default) Current limit = 16 mA Current limit = 20 mA Current limit = 24 mA Duty cycle = (PWM_D(4:0)+1)/32 (Default = 0)
D4~D0
PWM_D(4:0)
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Table 29: Register Index 5: B LED Driver
Register Index 5: B LED Driver Bit D7 D6~D5 ON CURLIM(1:0) Name Value 0 1 0 1 2 3 0~31 Description Power down (Default) Power on Current limit = 12 mA (Default) Current limit = 16 mA Current limit = 20 mA Current limit = 24 mA Duty cycle = (PWM_D(4:0)+1)/32 (Default = 0)
D4~D0
PWM_D(4:0)
Table 30: Register Index 6: KP LED Driver
Register Index 6: KP LED Driver Bit D7 D6 D5 D4~D0 ON Reserved Reserved PWM_D(4:0) Name Value 0 1 Power down (Default) Power on Description
0~31
Duty cycle = (PWM_D(4:0)+1)/32 (Default = 0)
Table 31: Register Index 7: BL LED Driver
Register Index 7: BL LED Driver Bit D7 D6 D5 D4~D0 ON Reserved BYPASS PWM_D(4:0) Name Value 0 1 0 1 0~31 Power down (Default) Power on No bypass (Default) Bypass divide-by-25 counter. Duty cycle = (PWM_D(4:0)+1)/32 (Default = 0) Description
Note: When bypass = 0, PWM frequency = DC-DC switching frequency / 25 / (BL_DIV+1) / 32, div = 0~15. When bypass = 1, PWM frequency = DC-DC switching frequency / (BL_DIV+1) / 32, div = 0~15.
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Table 32: Register Index 8: Miscellaneous
Register Index 8: Miscellaneous Driver Bit D7 D6 D5 Name CHR_PUMP_EN VA_SW PWR_SAVE Value 0 1 0 1 0 1 Description Power down (Default) Power on Auxiliary analog output switch off (Default) Auxiliary analog output switch on VD = normal voltage output If 1.8 V is selected as Vcore voltage, then when PWR_SAVE = 1, and SRCLKEN = 0 (i.e. the BB enters sleep mode), the Vcore is switched to 1.5 V. If 1.2 V is selected as Vcore voltage, then when PWR_SAVE = 1, and SRCLKEN = 0 (i.e. the BB enters sleep mode), the Vcore is switched to 0.9 V VA enable signal determination, same as VD (Default) VA enable signal determination, same as VTCXO VMC power off (Default) VMC power on VSIM = 1.8 V (Default) VSIM = 3.0 V Audio amplifier power off (Default) Audio amplifier power on Vibrator driver power off (Default) Vibrator driver power on
D4 D3 D2 D1 D0
VA_SEL VMC VSIMSEL SPEAKER VIBRATOR
0 1 0 1 0 1 0 1 0 1
** When turned on, VB_OUT is actually same as VBAT. VB_OUT is floating when the phone is switched off in order to stop current leaks to the BB.
Table 33: Register Index 9: DIM Clock
Register Index 9: DIM Clock Bit D7~D4 D3~D0 Name BL_DIV DIV Value 15~0 15~0 Description Backlight frequency division control (Default = 0) R,G,B,KP frequency division control (Default = 0)
Table 34: Register Index A: Charger Control_2
Register Index A: Charger Control 2 Bit D7~D4 D3 D2~D0 Name Reserved OV_SPI_CLR (W only) CHOFST[2:0] Value 0 1 7~0 Description When written with 0, clears OV condition. No effect. Charging current offset. (Default is b'100 = 4)
Note: When OV_SPI_CLR is written with a 0, the ov_spi condition is cleared. Writing a 1 has no effect. If read, it returns the same value as Register 0 [7] (ov_spi).
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Table 35: Register Index B: Bandgap Settings
Register Index B: Bangap Settings Bit D7~D4 D3~D2 Name Reserved UV_SEL[1:0] Value 3 2 1 0 Description Set UV falling threshold voltage to 2.50 V (Sync. with DDLO) Set UV falling threshold voltage to 2.60 V Set UV falling threshold voltage to 2.75 V Set UV falling threshold voltage to 2.90 V
D1 D0
Reserved Reserved
Table 36: Register Index C: LDO Test 1 EN
Register Index C: LDO TEST1 EN Bit D7~D0 Name Reserved Value Description
Note: For LDO_TEST1 and LDO_TEST2, the pin combination must be: (TEST_MODE = 1) AND (SIMVCC = 1).
Table 37: Register Index D: LDO Test 2 EN
Register Index D: LDO TEST2 EN Bit D7 D6 D5 D4 D3~D0 Name Reserved Reserved INT_DRV RESET_DRV Reserved Value Description
0 1 0 1
Set Interrupt pad driving strength (Default = 1) Set Reset pad driving strength (Default = 1)
Note: For LDO_TEST1 and LDO_TEST2, the pin combination must be: (TEST_MODE = 1) AND (SIMVCC = 1).
Table 38: Register Index E: Charge Pump
Register Index E: Charge Pump Control Bit D7 D6~D5 D4~D3 D2 D1 D0 Name PUMPCLCTRL PUMPDSEL[1:0] PUMPSSEL[1:0] Reserved VIBSEL USB_CHR_EN Value 0 1 3~0 3~0 0 1 0 1 Description Charge pump control signal (Default = 0) Charge pump control signal (Default = b'11 = 3) Charge pump control signal (Default = 0) VIBR = 1.8 V (Default) VIBR = 3.2 V Disable USB charging. For OTG. (Default) Enable USB charging
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Table 39: Register Index F: Extras
Register Index F: Extras Bit D7 D6 D5 D4 D3 D2 D1~D0 Name VA_SW_SEL VBSSEL_SPI[1] VBSSEL_SPI[0] VBHSEL VMCSEL Reserved PUMPDELAY[1:0] Value 0 1 0 1 0 1 0 1 0 1 3 2 1 0 Description VA_SW = 2.8 V (Default) VA_SW = 3.3 V VB_OUT disable (Default) (see Note) VB_OUT enable ISENSE_OUT disable (Default ) (see Note) ISENSE_OUT enable VB_OUT = 0.5*VBAT; ISENSE_OUT = 0.5*ISENSE_OUT (see Note) VB_OUT = VBAT; ISENSE_OUT = ISENSE_OUT VMC=2.8 V (Default) VMC=3.0 V Charge pump softstart time delay = 600 s (Default = 3) Charge pump softstart time delay = 500 s Charge pump softstart time delay = 400 s Charge pump softstart time delay = 200 s
Note: Charge pump delay is controlled as follows:
* *
When CHR_PUMP_EN = 1, after PUMPDELAY (200, 400, 500, or 600 s), the PUMPDSEL changes from the default value (b'11) to the new PUMPDSEL value. When CHR_PUMP_EN = 0, or a reset is asserted, PUMPDSEL reverts back to the default value b'11.
VBSSEL_SPI<1:0> function blocks:
Figure 15: ISENSE_OUT and VB_OUT Block
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The following schematic illustrates a typical application for this PMIC to connect with an MT621X BB. Refer to the application paragraph (Section 6.2) for other possible connections.
Figure 16: Connection to the BB
VD VUSB VA VIO VRTC VTCXO VM VSIM VMC
AC INT USB GDRVAC GDRVUSB SPI
Reset Interrupt SPI interface
Reset INT SPI
BB Chip
PMIC
PWRBB SRCLKEN
BB_Wakeup SR_Clk_En Keypad
SEL 1 ISENSE
PWR_KEY BAT_ON ISENSE_OUT SIM VBAT VB_OUT I-charg
SEL 2 SIMVCC SIMSEL
0.2 OHM
VBAT
ISENSE_OUT Aux_ADC_0 VB_OUT Aux_ADC_1 Aux_ADC_2 SIM
Battery Pack NTC
Bat-Temp
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6
MT6318 Packaging
6.1
Package Dimensions
Based on the current pin count and board layout concern, TFBGA is the preferred package for this PMIC. See the next page for the MT6318 package dimensions (Figure 17).
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Figure 17: MT6318 Package Dimensions
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6.2
Application Examples
A typical application example is shown in Figure 18. Main features are listed as below: 1. 2. 3. 4. 5. 6. 7. 8. 9. Charging using USB or AC-DC adaptor. Shows charging status during pre-charging if charging with adaptor power. Supports power for the memory card. Supports Class AB audio amplifier for a loud speaker. Supports up to 4 white LEDs for the main LCD backlight. Supports up to 300 mA for flash LEDs. Supports 3 independent LED drivers (any color). Supports dim control for all LED drivers. Battery removal protection.
Figure 18: Application Example
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Appendix
BAT_ON Functional Circuit Example (with BAT Temperature Sensor)
Figure 19: BAT_ON Connection with Battery Temperature Sensor Example
Figure 20: CHG/BAT State Diagram
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Index of Figures
Figure 1: MT6318 TFBGA 96(7x7 mm ) Pin Assignments.............................................................................................. 7 Figure 2: MT6318 TFBGA 96(7x7 mm ) Pin Assignments............................................................................................ 28 Figure 3: Power Management State Diagram............................................................................................................... 33 Figure 4: PMIC Hardware State.................................................................................................................................... 34 Figure 5: Power Key State Timing ................................................................................................................................ 36 Figure 6: State Timing for Wake-up, Paging and Standby ............................................................................................ 36 Figure 7: Charger State Timing..................................................................................................................................... 37 Figure 8: Reset Timing ................................................................................................................................................. 37 Figure 9: PMIC Block Diagrams ................................................................................................................................... 38 Figure 10: PMIC Charger Block Diagrams ................................................................................................................... 39 Figure 11: Charging States Diagram............................................................................................................................. 42 Figure 12: I-V Curve of Li-Ion Battery Charging............................................................................................................ 44 Figure 13: LED Driver Block Diagram........................................................................................................................... 47 Figure 14: SPI Bus Timing............................................................................................................................................ 49 Figure 15: ISENSE_OUT and VB_OUT Block.............................................................................................................. 56 Figure 16: Connection to the BB................................................................................................................................... 57 Figure 17: MT6318 Package Dimensions..................................................................................................................... 59 Figure 18: Application Example .................................................................................................................................... 60 Figure 19: BAT_ON Connection with Battery Temperature Sensor Example ............................................................... 61 Figure 20: CHG/BAT State Diagram ............................................................................................................................. 61
2
2
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Index of Tables
Table 1: MT6188 Pin Descriptions .................................................................................................................................. 8 Table 2: Absolute Maximum Ratings............................................................................................................................. 10 Table 3: Operation Condition ........................................................................................................................................ 10 Table 4: General Electrical Specifications..................................................................................................................... 10 Table 5: Regulator Specifications.................................................................................................................................. 11 Table 6: Power Switch Specifications ........................................................................................................................... 13 Table 8: Speaker Amplifier Specifications ..................................................................................................................... 14 Table 9: SIM Interface Specifications............................................................................................................................ 14 Table 10: Charger Specifications .................................................................................................................................. 15 Table 11: MT6188 Pin Descriptions .............................................................................................................................. 29 Table 12: LDO Regulators ............................................................................................................................................ 31 Table 13: LED Drivers................................................................................................................................................... 32 Table 14: LCD Backlight Driver..................................................................................................................................... 32 Table 15: Phone State Descriptions.............................................................................................................................. 34 Table 16: Extreme Case Definitions.............................................................................................................................. 35 Table 17: LDO Turn On Table ....................................................................................................................................... 35 Table 18: SEL1 and SEL2 Settings for Each Phone State............................................................................................ 41 Table 19: Charger State Transition ............................................................................................................................... 42 Table 20: CHR_DET Internal Bit ................................................................................................................................... 42 Table 21: Charging Control........................................................................................................................................... 43 Table 22: Operation for Different Charging Sources ..................................................................................................... 44 Table 23: SPI Definition ................................................................................................................................................ 48 Table 24: Register Control Table................................................................................................................................... 50 Table 25: Register Index 0: Charger Status Register.................................................................................................... 51 Table 26: Register Index 1: Charger/Speaker Amplifier Control.................................................................................... 51 Table 27: Register Index 2: LDO Status........................................................................................................................ 52 Table 28: Register Index 3: R LED Driver..................................................................................................................... 52 Table 29: Register Index 4: G LED Driver..................................................................................................................... 52 Table 30: Register Index 5: B LED Driver ..................................................................................................................... 53 Table 31: Register Index 6: KP LED Driver................................................................................................................... 53 Table 32: Register Index 7: BL LED Driver ................................................................................................................... 53 Table 33: Register Index 8: Miscellaneous ................................................................................................................... 54 Table 34: Register Index 9: DIM Clock ......................................................................................................................... 54 Table 35: Register Index A: Charger Control_2 ............................................................................................................ 54 Table 36: Register Index B: Bandgap Settings ............................................................................................................. 55 Table 37: Register Index C: LDO Test 1 EN.................................................................................................................. 55 Table 38: Register Index D: LDO Test 2 EN.................................................................................................................. 55
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Table 39: Register Index E: Charge Pump ................................................................................................................... 55 Table 40: Register Index F: Extras................................................................................................................................ 56
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